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- Sun May 31, 2020 4:20 pm
- Forum: FV-1 software questions
- Topic: Help me understand the Delay SRAM and how to address it
- Replies: 2
- Views: 33779
Help me understand the Delay SRAM and how to address it
I understand that the Delay SRAM stores 32 kbits of samples which equates to 1 sec. To write to the current /start of the Delay SRAM , we use the WRA instruction. To read a sample from a particular location and output to ADCL, we do something like the below, SOF 0,0 WRAX ADDR_PTR, 0 ADDR_PTR can be ...