Spin Semiconductor

Rdfx+Wrlx gives you control over the shelving, Rdfx+Wrax does not.

Rdfx+Wrax works only for lowpass, for highpass you need to use Rdfx+Wrhx

The datasheet says nothing at all about the possibility to disable clock stretching, so I guess it's not a possibility (I'm using Atmel Atmega chips by the way). uC is running at 8 Mhz system clock and only a few lines of codes are executed whenever i2c interrupt occur, so I'm at lost as to why it n...

Thanks for the suggestion Larry. Anyway after pouring over the uC datasheet again I found that the i2c module was actually stretching the clock when transfer speed is higher than 80 Kbps, and I remember reading on another thread that FV-1 does not support clock stretching, that explains why I need t...

By the way, I've already verified that the uC is capable of I2C communication with 250KHz with other devices, so the I2C implementation is basically working, what I want to know is whether FV1 expects a certain condition or timing constraint to work at 250 KHz I2C clock.

I've been using a microcontroller uC) to emulate an eeprom to feed program codes to FV1 via I2C. The FV1 runs on a clock signal (32Khz) generated by the uC. What baffled me is that, the only way I can get a successful I2C data transfer is if I bring the clock frequency down to around 10 KHz, if the ...

This is a great idea, I've myself thought of this technique previously, but never gave it a try cause I hate to lose the second output channel. One important thing to consider is the 'settling time' of the FV-1 pots input ADCs, you may have to devise some kind of 'wait state' where we don't read the...

You don`t have a simple Low-Pass-Filter at the output (1k/2n2). The closer the input-/output-filters are to the chip, the better. See Figure 1, and its comments: http://www.spinsemi.com/Products/datasheets/spn1001/FV-1.pdf He did have a simple LPF for the outputs built around the inverting amps (op...

bdoan wrote:So if I run an analog limiter to protect the input of the FV-1, and I limit to 3Vp-p, can I ignore the 6db headroom rule?

Not sure what you mean by '6db headroom rule', but a compander does help (to some degree) to overcome the headroom limitation.

Can you recommend any analog compressor/limiter circuits that will work from a single 3.3v supply? If your goal is to compress the signal (and expand later) before it hits the FV-1 there's no use running the compression circuitry from 3.3V as it'll suffer the same headroom limitation. Run it from 9...

Digital Larry wrote:

gfisys wrote: You got the equation wrong, the correct one is
RDFXcoeff = 1 - exp(-2*pi * Freq / 32768)

Is that for HPF only or both HPF and LPF?

Thx,

DL

Both HP & LP

I have been spending the last few days trying to understand how to do simple low pass and high pass filters. So far, I believe I understand how the low pass filtering is accomplished but I am baffled as to how to create a HPF. Based on this post http://www.spinsemi.com/forum/viewtopic.php?t=481&...

Noted, thanks.

Still on the topic, can I use the voltage that appears on pin 3 (Mid) as a reference for biasing other parts of the circuits (e.g op-amps)?

Hi Frank, in the reference application schematic on the FV-1 datasheet there are a pair of coupling caps (one for each input), and the accompanying paragraph says "The inputs should be conducted through coupling capacitors, as the inputs are internally biased to a VDD/2 potential." Now if ...

Yeah I did noticed that you wrote 512 samples into the delay line, and I did changed that to 256 when I reduce the delay length to to 2048, with this setup the tremolo effect becomes much more pronounced, to my ear it sounds worse than the warble effect of the single step algorithm with 4096 length

Your improved octave up algorithm works quite nicely donstavely, it definitely sounds more pleasant than the standard algorithm, too bad the latency is doubled. I tried halving the delay length to 2048, but the sound quality degrades to the point that the it sounds worse than the standard algorithm ...