Rdfx+Wrlx gives you control over the shelving, Rdfx+Wrax does not.
Rdfx+Wrax works only for lowpass, for highpass you need to use Rdfx+Wrhx
Search found 28 matches
- Sat May 29, 2021 4:18 am
- Forum: Algorithm development
- Topic: WRLX and WLHX coeffient equations
- Replies: 9
- Views: 17966
- Tue Oct 09, 2018 8:31 am
- Forum: FV-1 hardware questions
- Topic: uController -> FV1 I2C data transfer
- Replies: 5
- Views: 5098
Re: uController -> FV1 I2C data transfer
The datasheet says nothing at all about the possibility to disable clock stretching, so I guess it's not a possibility (I'm using Atmel Atmega chips by the way). uC is running at 8 Mhz system clock and only a few lines of codes are executed whenever i2c interrupt occur, so I'm at lost as to why it n...
- Mon Oct 08, 2018 8:12 am
- Forum: FV-1 hardware questions
- Topic: uController -> FV1 I2C data transfer
- Replies: 5
- Views: 5098
Re: uController -> FV1 I2C data transfer
Thanks for the suggestion Larry. Anyway after pouring over the uC datasheet again I found that the i2c module was actually stretching the clock when transfer speed is higher than 80 Kbps, and I remember reading on another thread that FV-1 does not support clock stretching, that explains why I need t...
- Sat Oct 06, 2018 10:44 pm
- Forum: FV-1 hardware questions
- Topic: uController -> FV1 I2C data transfer
- Replies: 5
- Views: 5098
Re: uController -> FV1 I2C data transfer
By the way, I've already verified that the uC is capable of I2C communication with 250KHz with other devices, so the I2C implementation is basically working, what I want to know is whether FV1 expects a certain condition or timing constraint to work at 250 KHz I2C clock.
- Sat Oct 06, 2018 9:59 pm
- Forum: FV-1 hardware questions
- Topic: uController -> FV1 I2C data transfer
- Replies: 5
- Views: 5098
uController -> FV1 I2C data transfer
I've been using a microcontroller uC) to emulate an eeprom to feed program codes to FV1 via I2C. The FV1 runs on a clock signal (32Khz) generated by the uC. What baffled me is that, the only way I can get a successful I2C data transfer is if I bring the clock frequency down to around 10 KHz, if the ...
- Sun Jun 21, 2015 7:54 am
- Forum: FV-1 hardware questions
- Topic: Using 6 Pots on the FV-1
- Replies: 7
- Views: 16419
This is a great idea, I've myself thought of this technique previously, but never gave it a try cause I hate to lose the second output channel. One important thing to consider is the 'settling time' of the FV-1 pots input ADCs, you may have to devise some kind of 'wait state' where we don't read the...
- Thu Jun 18, 2015 10:06 pm
- Forum: FV-1 hardware questions
- Topic: noise output "ring ring ... " help me pls!
- Replies: 15
- Views: 16001
You don`t have a simple Low-Pass-Filter at the output (1k/2n2). The closer the input-/output-filters are to the chip, the better. See Figure 1, and its comments: http://www.spinsemi.com/Products/datasheets/spn1001/FV-1.pdf He did have a simple LPF for the outputs built around the inverting amps (op...
- Wed May 27, 2015 3:32 am
- Forum: FV-1 hardware questions
- Topic: Headroom
- Replies: 5
- Views: 7198
- Wed May 20, 2015 5:38 pm
- Forum: FV-1 hardware questions
- Topic: Headroom
- Replies: 5
- Views: 7198
Can you recommend any analog compressor/limiter circuits that will work from a single 3.3v supply? If your goal is to compress the signal (and expand later) before it hits the FV-1 there's no use running the compression circuitry from 3.3V as it'll suffer the same headroom limitation. Run it from 9...
- Sat Mar 07, 2015 5:44 pm
- Forum: Algorithm development
- Topic: High Pass and Low Pass Filters
- Replies: 15
- Views: 19103
Re: High Pass and Low Pass Filters
Both HP & LPDigital Larry wrote:Is that for HPF only or both HPF and LPF?gfisys wrote: You got the equation wrong, the correct one is
RDFXcoeff = 1 - exp(-2*pi * Freq / 32768)
Thx,
DL
- Fri Mar 06, 2015 6:36 pm
- Forum: Algorithm development
- Topic: High Pass and Low Pass Filters
- Replies: 15
- Views: 19103
Re: High Pass and Low Pass Filters
I have been spending the last few days trying to understand how to do simple low pass and high pass filters. So far, I believe I understand how the low pass filtering is accomplished but I am baffled as to how to create a HPF. Based on this post http://www.spinsemi.com/forum/viewtopic.php?t=481&...
- Thu Oct 30, 2014 4:02 pm
- Forum: FV-1 hardware questions
- Topic: Inputs coupling caps
- Replies: 3
- Views: 5825
- Thu Oct 30, 2014 9:05 am
- Forum: FV-1 hardware questions
- Topic: Inputs coupling caps
- Replies: 3
- Views: 5825
Inputs coupling caps
Hi Frank, in the reference application schematic on the FV-1 datasheet there are a pair of coupling caps (one for each input), and the accompanying paragraph says "The inputs should be conducted through coupling capacitors, as the inputs are internally biased to a VDD/2 potential." Now if ...
- Fri Jun 27, 2014 9:24 pm
- Forum: Algorithm development
- Topic: Improved octave-up routine
- Replies: 6
- Views: 10186
- Tue Jun 24, 2014 11:40 pm
- Forum: Algorithm development
- Topic: Improved octave-up routine
- Replies: 6
- Views: 10186
Your improved octave up algorithm works quite nicely donstavely, it definitely sounds more pleasant than the standard algorithm, too bad the latency is doubled. I tried halving the delay length to 2048, but the sound quality degrades to the point that the it sounds worse than the standard algorithm ...