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rdax adcl,1
rdax adcr,1
and %01110000_00000000_00000000 ;Mask to 8-bit resolution
wrax dacl,1
wrax dacr,0
Moderator: frank
Code: Select all
rdax adcl,1
rdax adcr,1
and %01110000_00000000_00000000 ;Mask to 8-bit resolution
wrax dacl,1
wrax dacr,0
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crush equ 0xfc0000 ;define the bit mask - 6 bits here
clr
rdax adcl,0.5
rdax adcr,0.5
skp neg,invit; working with 2's comp numbers, if negative skip down
and crush
skp gez,outter
invit:
sof -1.0,0 ; for negative samples, invert them,
and crush ; mask the data
sof -1.0,0 ; invert it back
outter:
wrax dacl,1.0
wrax dacr,1.0
Thank you!!, the problem was that the negative part of the signal gets positive with the mask. Now I modified the code and invert the signal first if it's negative, mask and then invert it back.frank wrote:Try this:And I think the issue with your code was that you were putting a 0 in the MSB position which flip negative values to positive.Code: Select all
crush equ 0xfc0000 ;define the bit mask - 6 bits here clr rdax adcl,0.5 rdax adcr,0.5 skp neg,invit; working with 2's comp numbers, if negative skip down and crush skp gez,outter invit: sof -1.0,0 ; for negative samples, invert them, and crush ; mask the data sof -1.0,0 ; invert it back outter: wrax dacl,1.0 wrax dacr,1.0
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;BIT CRUSHER
;Mono Input, Mono output, Wet only
;POT2: BIT RATE, 8-steps: 24 bits, 16 bits, 14 bits, 12 bits, 10 bits, 8 bits, 6 bits, 4 bits
equ bit reg0
rdax adcl, 0.5
rdax adcr, 0.5
skp neg, 1
wrax bit, 0
sof -1, 0
wrax bit, 0
;Prepare skip routine with POT2. 8 steps.
rdax pot2, 1
and %01110000_00000000_00000000
skp zro, BIT24
sof 1, -1/8
skp zro, BIT16
sof 1, -1/8
skp zro, BIT14
sof 1, -1/8
skp zro, BIT12
sof 1, -1/8
skp zro, BIT10
sof 1, -1/8
skp zro, BIT8
sof 1, -1/8
skp zro, BIT6
sof 1, -1/8
clr
skp zro, BIT4
BIT4: ;4 Bits
rdax bit, 1
and %11110000_00000000_00000000
wrax bit, 0
skp zro, OUTPUT
BIT6: ;6 Bits
rdax bit, 1
and %11111000_00000000_00000000
wrax bit, 0
skp zro, OUTPUT
BIT8: ;8 Bits
rdax bit, 1
and %11111100_00000000_00000000
wrax bit, 0
skp zro, OUTPUT
BIT10: ;10 Bits
rdax bit, 1
and %11111110_00000000_00000000
wrax bit, 0
skp zro, OUTPUT
BIT12: ;12 Bits
rdax bit, 1
and %11111111_00000000_00000000
wrax bit, 0
skp zro, OUTPUT
BIT14: ;14 Bits
rdax bit, 1
and %11111111_10000000_00000000
wrax bit, 0
skp zro, OUTPUT
BIT16: ;16 Bits
rdax bit, 1
and %11111111_11000000_00000000
wrax bit, 0
skp zro, OUTPUT
BIT24: ;24 Bits
clr
skp zro, OUTPUT
OUTPUT:
rdax bit, 0.5
skp gez, 1
sof -1, 0
wrax dacl, 1
wrax dacr, 0
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rdax adcl, 0.5 ; read in right in
rdax adcr, 0.5 ; add left in
skp neg, 1 ; if negative skip next instruction
wrax bit, 0 ; save acc to bit and make it 0
sof -1, 0 ; skipped here if negative and invert the signal BUT if the signal was positive we are here with a 0 in acc
wrax bit, 0 ; write positive value (if was negative) into bit or write 0 over the above positive value
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OUTPUT:
rdax bit, 0.5 ; read bit
skp gez, 1 ; bit is always zero or positive due to above code
sof -1, 0 ; never do this since bit is never negative
wrax dacl, 1
wrax dacr, 0
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;BITCRUSHER
;Mono Input, Mono output, Wet only
;POT2: Bit Depth, 8-steps; 24 bits, 16 bits, 14 bits, 12 bits, 10 bits, 8 bits, 6 bits, 4 bits
;register equates ;
equ bit reg0
equ bitsgn reg1
;Bitcrusher
clr
rdax adcl, 0.5 ; read in left
rdax adcr, 0.5 ; read in right
skp gez, 4 ; if ACC >= 0, then skip 4 instructions (sign is positive)
wrax bitsgn, 1 ; write ACC to bitsign (only if negative)
sof -1.0, 0 ; invert the number in the ACC (only if was negative)
wrax bit, 0 write ACC to bit, clear ACC (only if was negative)
skp zro, 2 ; if ACC = 0, then skip 2 instructions (only if was negative)
wrax bitsgn, 1 ; write ACC to bitsign (sign is positive)
wrax bit, 0 ; write ACC to bit (sign is positive)
;Prepare skip routine with POT2. 8 steps.
rdax pot2, 1.0
and %01110000_00000000_00000000
skp zro, BIT24
sof 1, -1/8
skp zro, BIT16
sof 1, -1/8
skp zro, BIT14
sof 1, -1/8
skp zro, BIT12
sof 1, -1/8
skp zro, BIT10
sof 1, -1/8
skp zro, BIT8
sof 1, -1/8
skp zro, BIT6
sof 1, -1/8
clr
skp zro, BIT4
BIT4: ;4 Bits
rdax bit, 1
and 0xf00000 ; %11110000_00000000_00000000
wrax bit, 0
skp zro, OUTPUT
BIT6: ;6 Bits
rdax bit, 1
and 0xfc0000 ; %11111100_00000000_00000000
wrax bit, 0
skp zro, OUTPUT
BIT8: ;8 Bits
rdax bit, 1
and 0xff0000 ; %11111111_00000000_00000000
wrax bit, 0
skp zro, OUTPUT
BIT10: ;10 Bits
rdax bit, 1
and 0xffc000 ; %11111111_11000000_00000000
wrax bit, 0
skp zro, OUTPUT
BIT12: ;12 Bits
rdax bit, 1
and 0xfff000 ; %11111111_11110000_00000000
wrax bit, 0
skp zro, OUTPUT
BIT14: ;14 Bits
rdax bit, 1
and 0xfffc00 ; %11111111_11111100_00000000
wrax bit, 0
skp zro, OUTPUT
BIT16: ;16 Bits
rdax bit, 1
and 0xffff00 ; %11111111_11111111_00000000
wrax bit, 0
skp zro, OUTPUT
BIT24: ;24 Bits
clr
skp zro, OUTPUT
OUTPUT:
rdax bitsgn, 1.0 read in bitsign to ACC, multiply by 1.0
skp gez, 3 ; if ACC >= 0, then skip 3 instructions
rdax bit, 1.0 ; read in bit to ACC, multiply by 1.0 (only if negative)
sof -1.0, 0 ; invert back the number in the ACC (only if negative)
skp neg, 1 ; if ACC < 0, then skip 1 instruction (only if negative)
rdax bit, 1 ; read in bit to ACC, multiply by 1.0
wrax dacl, 1.0 ; write outputs
wrax dacr, 0; zero ACC