Code: Select all
lfsr equ reg0
lfsr2 equ reg1
temp equ reg2
mono equ reg3
lowpass equ reg4
hipass equ reg5
bndpass equ reg6
lfo equ reg7
lfsrfil equ reg8
;
; seed the lfsr with a non-zero value
skp run,start
wlds sin0,0,32767
ldax adcl
or 0x001000 ; just to ensure it is really non-zero
wrax lfsr,0
;
;
start:
ldax pot0
mulx pot0
mulx pot0
wrax sin0_rate,0
;rdax adcl,.25
rdax adcr,.5
wrax mono,0
cho rdal,sin0 ;load sin0 into ACC
sof 1,0.5 ;scale 0 to 1
sof -1,0 ;0 to -1
skp neg, shftzro ;shftzro if ACC is neg(-), otherwise
ldax lfsr ; get lfsr reg
and 0x00ffff ; get rid of upper bits to avoid saturating
wrax lfsr2,1.0 ; save the result and keep in acc
rdax lfsr2,0.5 ; get lfsr shifted 1 bit and add it
rdax lfsr2,0.25 ; get lfsr shifted 2 bits and add
rdax lfsr2,0.0078125 ; get lfsr shifted 7 bits and add
and 0x000001 ; only care about lsb of result
wrax temp,0 ; save result
rdax lfsr,0.5 ; get lfsr reg shifted right
and 0x7fffff ; clear msb
wrax lfsr,0 ; save result
ldax temp ; get the result back
skp zro,shftzro ; if 0 jump
; if here the bit was a 1
sof 0,0 ; clear acc
rdax lfsr,1.0 ; get the low
or 0x800000 ; set the bit
wrax lfsr,0 ; save it
shftzro:
rdax mono,1
rdax lowpass,-1 ;q * input - LPF
rdax bndpass,-1 ;1 * input - LPF + (-q * BPF) =
wrax hipass,.1224 ;HPF * (Fc = 640Hz)
rdax bndpass,1 ;HPF * Fc + BPF =
wrax bndpass,.1224 ;BPF * Fc
rdax lowpass,1 ;BPF * Fc + LPF =
wrax lowpass,.1224 ;LPF * Fc
sof 0,0 ;clear ACC
rdax lowpass,1 ;read lowpass into ACC
rdax hipass,-1 ;subtract hipass
mulx lfsr ;use lfsr for crossfade
rdax hipass,1 ;add hipass
rdax mono,-1 ;subtract mono
mulx pot1 ;use pot1 for blend control
rdax mono,1 ;add mono
;wrax dacl,1
wrax dacr,0 ;write to dacr, clear ACC