What is the best way to use mono input to both ADC's
Moderator: frank
What is the best way to use mono input to both ADC's
I am using a mono input buffer/filter circuit into the FV-1 which drives both the ADC's pin 1 and 2 of the Fv-1. Pins 1&2 are connected directly to each other.
I am now considering driving both inputs from the mono source but each of the ADC's having it's own DC decoupling from the mono input rather than being connected directly.
Having previously read that both inputs could be directly connected I have always used this method, may this cause a slight DC offset across the ADC's or is it perfectly fine to carry on with the 2 ADC's connected this way rather than keeping them separate. If I decouple them then it really is only a couple of extra components to add.
I am now considering driving both inputs from the mono source but each of the ADC's having it's own DC decoupling from the mono input rather than being connected directly.
Having previously read that both inputs could be directly connected I have always used this method, may this cause a slight DC offset across the ADC's or is it perfectly fine to carry on with the 2 ADC's connected this way rather than keeping them separate. If I decouple them then it really is only a couple of extra components to add.
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I would tie the unused ADCR to ground through a 100n capacitor just so a high impedance input isn't left waving in the breeze like an antenna. Probably not important as long as you are not reading the input, but a good practice nonetheless.Digital Larry wrote:I don't see any benefit to doing mono this way. Why not just connect one input and then read from ADCL when you need to?
regards, Jack
I am using Both inputs, reading them both at 0.5 then summing them together then writing to a location to use later. I am not sure if this is correct but doing this seems to give a better s/n ratio and more headroom compared to reading one input at say 0.8. What I am really asking though is that having tied both ADC's directly together may a small DC offset be present or is it better to decouple both inputs with a C/R network first.
The datasheet mentions internal 1/2 Vref on both ADC's but no mention of whether they are internally decoupled.
The datasheet mentions internal 1/2 Vref on both ADC's but no mention of whether they are internally decoupled.
After reading the Datasheet (again) I not sure the inputs are high pass filtered, the datasheet shows external high pass circuit on each input of course but this is not what I am really referring too.slacker wrote:There shouldn't be any DC offset, the inputs are high pass filtered which would remove any DC that was present.
This is from the datasheet.
'The inputs should be conducted through coupling capacitors, as the inputs are internally biased to a VDD/2 potential'
So I believe that answers my question really.
That is the method I have always used, with both inputs directly linked together. I was just wondering if this was good practice or may introduce a small hum. Would separating the inputs through separate dc blocking and LP filter networks benefit at all?Sweetalk wrote:If you don't bypass the inputs there's Vcc/2 on each one. I'm tying both together and reading them both also.
;read both inputs and store in 'dry' register
rdax adcl,0.5
rdax adcr,0.5
wrax dry, 0
That's a good question and I have the same one. We'll have to try both optinos and check the results...ice-nine wrote:That is the method I have always used, with both inputs directly linked together. I was just wondering if this was good practice or may introduce a small hum. Would separating the inputs through separate dc blocking and LP filter networks benefit at all?Sweetalk wrote:If you don't bypass the inputs there's Vcc/2 on each one. I'm tying both together and reading them both also.
;read both inputs and store in 'dry' register
rdax adcl,0.5
rdax adcr,0.5
wrax dry, 0
I will find out soon enough as I have send new pcb's to fab that can be stuffed either way. I will post results when they come back.Sweetalk wrote:That's a good question and I have the same one. We'll have to try both optinos and check the results...ice-nine wrote:That is the method I have always used, with both inputs directly linked together. I was just wondering if this was good practice or may introduce a small hum. Would separating the inputs through separate dc blocking and LP filter networks benefit at all?Sweetalk wrote:If you don't bypass the inputs there's Vcc/2 on each one. I'm tying both together and reading them both also.
;read both inputs and store in 'dry' register
rdax adcl,0.5
rdax adcr,0.5
wrax dry, 0
Great!!ice-nine wrote:I will find out soon enough as I have send new pcb's to fab that can be stuffed either way. I will post results when they come back.Sweetalk wrote:That's a good question and I have the same one. We'll have to try both optinos and check the results...ice-nine wrote: That is the method I have always used, with both inputs directly linked together. I was just wondering if this was good practice or may introduce a small hum. Would separating the inputs through separate dc blocking and LP filter networks benefit at all?
;read both inputs and store in 'dry' register
rdax adcl,0.5
rdax adcr,0.5
wrax dry, 0
I made a last minute revision to the boards and added the option to be able to use either input configuration by not fitting some components and joining the inputs or to fit all the components for separate input de coupling.Sandrine wrote:I would use a cap and resistor on each input. The variance in DC offset could cause noise, to varying degrees.
I have built the joint input layout first and feel it is noise free, next build will be separate inputs and I will compare the two builds for any differences.
Picture of the first build
Great!!, what anti-alias filter are you using?.ice-nine wrote:I made a last minute revision to the boards and added the option to be able to use either input configuration by not fitting some components and joining the inputs or to fit all the components for separate input de coupling.Sandrine wrote:I would use a cap and resistor on each input. The variance in DC offset could cause noise, to varying degrees.
I have built the joint input layout first and feel it is noise free, next build will be separate inputs and I will compare the two builds for any differences.
Picture of the first build