I am working on some effects for a eurorack module (my company is MacroMachines.net), and I am currently experimenting with frozen delay lines and scrubbing. In the vein of the Greenwood file but way cleaner and deeper.
First I wanted to ask if there is a way to use the skip for non zero crossings to be able to grab wavelets of a full cycle waveform between two zero crosses. Or better yet have a full up down up cycle so the ends would be going in the same direction.
Second, I want to see how to create a ramp lfo driven window. I read a bit about how this might be done in the application note AP-0001 about the Lfos. I just didn't quite understand it. In the document they show 2 offset ramps which is easy, but then it shows a cross fade envelope that I can't seem to find in the actual example.
I just made an interesting time stretching effect by commenting out a few lines in the OEM echo file.. It really was a "Happy Hacky accident" discovery but it sounds pretty great:
https://instagram.com/p/BFFZ7EAByhp/
Granular Time Scrubbing
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The crossfade ramps and all that are generated internally in the FV-1. All you have to do is use the pitch shift code as shown and it all magically happens. So I'm not sure what else you're trying to do with the Ramp.
Regarding skip instructions, you can combine ZRC and GEZ to trap a positive zero crossing.
Regarding skip instructions, you can combine ZRC and GEZ to trap a positive zero crossing.
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Heya Digital Larry,
My main goal is something that I have not yet seen done with the FV-1 but I know it is possible because of a few programs I have seen by other people, and in general the instruction set seems pretty capable.
Simple Version:
audio is pass through, but also recording into delay mem
if pot 0 is above a threshold (basically anything above zero, but I know it might be realistically 0.0001) trap audio in circulating delay line memory by feeding the output back to the input instead of the adc, effectively "sampling" a bit of audio.
feed the output of that circulating "sample" into another delay line with a ramp going at a rate of [1/length*rate+offset]
cancel out the automatic delay line read index by using another ramp going at length*sampleRate/sampleRate
use pot1 to scrub through the buffer by driving offset
if pot 0 goes back below threshold, switch back to incoming audio
More Complex:
have the read index snapped to zero crossings
have the write state snapped to zero crossings, so that each wave cycle is captured and repeated until the next zero crossings
use both up and down cross to capture entire cycle rather then just half, or use a flip flop to capture every other cross (assuming it must cross down and then back up, which is usually the case)
Questions:
the main things I don't understand are how I map things, how do I deal with my index read positions? in samples? in 0-1?
If I want to go another route which instead of using zero crossing detection, would window the grain being played by a cosine envelope, with a second grain being played and windowed 180 degrees out of phase from the first, so the wrap around points are never heard. Also the values of start read offset would be sample-and-held and the wrap of each phase read so that there is smooth position scrubbing without pitch artifacts or clicks
I realize this is far more easily achieved with a microcontroller and I have code for this, but I enjoy a challenge and doing things that haven't been done before/bastardizing intended purposes in cool, useful, and interesting ways. Pushing the limits so to speak.
I am studying some of the pitch shifters as they are the closest to what I am after, as well as the forum patch
references:
http://www.spinsemi.com/forum/viewtopic.php?t=20
http://www.spinsemi.com/forum/viewtopic ... ight=jonny[/list]
My main goal is something that I have not yet seen done with the FV-1 but I know it is possible because of a few programs I have seen by other people, and in general the instruction set seems pretty capable.
Simple Version:
audio is pass through, but also recording into delay mem
if pot 0 is above a threshold (basically anything above zero, but I know it might be realistically 0.0001) trap audio in circulating delay line memory by feeding the output back to the input instead of the adc, effectively "sampling" a bit of audio.
feed the output of that circulating "sample" into another delay line with a ramp going at a rate of [1/length*rate+offset]
cancel out the automatic delay line read index by using another ramp going at length*sampleRate/sampleRate
use pot1 to scrub through the buffer by driving offset
if pot 0 goes back below threshold, switch back to incoming audio
More Complex:
have the read index snapped to zero crossings
have the write state snapped to zero crossings, so that each wave cycle is captured and repeated until the next zero crossings
use both up and down cross to capture entire cycle rather then just half, or use a flip flop to capture every other cross (assuming it must cross down and then back up, which is usually the case)
Questions:
the main things I don't understand are how I map things, how do I deal with my index read positions? in samples? in 0-1?
If I want to go another route which instead of using zero crossing detection, would window the grain being played by a cosine envelope, with a second grain being played and windowed 180 degrees out of phase from the first, so the wrap around points are never heard. Also the values of start read offset would be sample-and-held and the wrap of each phase read so that there is smooth position scrubbing without pitch artifacts or clicks
I realize this is far more easily achieved with a microcontroller and I have code for this, but I enjoy a challenge and doing things that haven't been done before/bastardizing intended purposes in cool, useful, and interesting ways. Pushing the limits so to speak.
I am studying some of the pitch shifters as they are the closest to what I am after, as well as the forum patch
references:
http://www.spinsemi.com/forum/viewtopic.php?t=20
http://www.spinsemi.com/forum/viewtopic ... ight=jonny[/list]
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As I recall, supposing you are mapping to some sample position x within the 32768 position RAM, then you multiply x * 256, put this into ADDR_PTR then use this for your RMPA.MacroMachines wrote: Questions:
the main things I don't understand are how I map things, how do I deal with my index read positions? in samples? in 0-1?
I don't know about a cosine envelope, maybe you could use SIN LFO and see if it would frequency lock to a specific buffer length. That's the challenge that comes to mind - how do you make sure the peaks match the glitch points in your buffer?MacroMachines wrote: If I want to go another route which instead of using zero crossing detection, would window the grain being played by a cosine envelope, with a second grain being played and windowed 180 degrees out of phase from the first, so the wrap around points are never heard. Also the values of start read offset would be sample-and-held and the wrap of each phase read so that there is smooth position scrubbing without pitch artifacts or clicks
I also thought you could do something with a triangle wave centered on zero. Boost it until the tops clip off (-1.0 to 1.0), then SOF 0.5, 0.5 to make it go 0 to 1.0. That's one half of your crossfade waveform. Take that and SOF -0.999, 0.999 - roughly speaking - (since you can't do SOF -1, 1) - that is your other crossfade driver 180 degrees out.
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Nice, thank you Larry for the tips, Ill try them out asap and let you know how it goes
Fried my pot0 adc somehow, so Im about to replace the smd chip on the dev board, steady fingers.. steady.
BTW, I love spinCAD, and was talking a bit with you on the forum over there. I could do this so easily in there with just a few more root access style nodes. Hmm.. I can easily pseudocode a couple simple modules that should be a piece of cake to implement.
actually I might be able to just do little sections using spinCAD and put everything together in ASM.. that actually might be a decent workflow especially for optimization (I notice since the workflow is modular there are many registers where they might not need to be, but would be really big task to try and make spinCAD optimize them out)
![Very Happy :D](./images/smilies/icon_biggrin.gif)
Fried my pot0 adc somehow, so Im about to replace the smd chip on the dev board, steady fingers.. steady.
BTW, I love spinCAD, and was talking a bit with you on the forum over there. I could do this so easily in there with just a few more root access style nodes. Hmm.. I can easily pseudocode a couple simple modules that should be a piece of cake to implement.
actually I might be able to just do little sections using spinCAD and put everything together in ASM.. that actually might be a decent workflow especially for optimization (I notice since the workflow is modular there are many registers where they might not need to be, but would be really big task to try and make spinCAD optimize them out)