Spin Semiconductor

(1)
A minor point: Jumping to any page indicated within the table of contents
in the SPINAsmUserManual.pdf actually takes you to a different page. The
offset of the table of contents entry to the page jumped to is 3 pages off.


(2)
SPINAsmUserManual.pdf, page 33 or 36 (in the XOR description). This
line is shown in the coding example:

xor $0 ; Set all ACC bits

XOR $0 is, of course, exactly equivalent to a NOP since it doesn't alter the
contents of the accumulator. XOR $FFFFFF would set all of the accumulator
bits since the previous line cleared the accumulator. Subtracting %1 would
also set all of the accumulator bits. The most obvious way to set all of the
accumulator bits high would be OR $FFFFFF since that only requires using
a single instruction.

Since the goal of the offending line was to exhibit XOR usage I'd assume
that XOR $FFFFFF would be the most appropriate fix here. A minor point:
It's also odd that a CLR pseudo-op wasn't used in the example instead of
the exactly equivalent, but more verbose, SOF to clear the accumulator.


(3)
There are numerous places where the internal delay memory is referred
to as SRAM and other places that refer to it as DRAM. As an example, the
table of contents listed page 21, at the bottom, describes the Delay SRAM
but the memory map on page 12 has DRAM Memory Allocated as the last
line. There are other examples.


Thank you.

(1) When I try it, it is taking me to the proper page. Note that the logical page is not the same as the physical page. I.e. page 52 is the 55th page in the file as the first 3 page are numbered i, ii and iii as they are not part of the "text" of the PDF. If I click on "52" in the TOC I am taken to the page marked "52" which is the "CHO RDA" page which is correct. Much like a physical book , the front page and TOC are not part of the text and use a different numbering system.

(2) I believe you are correct here and it should have been an "XOR $FF...". CLR was not used as the pseudo-op hadn't been created yet and we didn't go back and update this example.


(3) Memory type changed during development of the chip, it is SRAM.