2 second delay
Moderator: frank
2 second delay
Hi folks,
is it possible to create a 2 second delay with the FV-1?
When yes, how can I create it?
Peace,
Ringo
is it possible to create a 2 second delay with the FV-1?
When yes, how can I create it?
Peace,
Ringo
You would need to run the chip at 16KHz as a result your bandwidth will fall to 8KHz and I'm not sure that the converters will operate that low, will need to check with Keith on it.
Frank Thomson
Experimental Noize
Experimental Noize
Discussed it with Keith and it looks like the limiting factor will be the PLL in the FV-1. But we feel that running at 16KHz should be OK, tests showed the chip operating properly below that speed.
Frank Thomson
Experimental Noize
Experimental Noize
It is not a hardware "problem". There is 32K of delay ram in the chip so to make it 2 seconds you need to run at a slower sample rate. So yes, use a 16KHz crystal instead of 32KHz and you can get 2 seconds of delay but the bandwidth will drop to 8KHz (1/2 Fs)
Frank Thomson
Experimental Noize
Experimental Noize
How did you get on
Hi Ringo,
How did you get on? Did it work OK. Personally I would have used a clock divider circuit rather than a different XTAL but however you do it
How did you get on? Did it work OK. Personally I would have used a clock divider circuit rather than a different XTAL but however you do it
Wurgle
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Here is a way to get a two second delay without modifying the hardware:
Use a variable to toggle between "even" and "odd" passes. (Start with the variable set to 1, negate it each pass, and test to pos or neg.)
On "even" passes, put your sample in the head end of the delay. Pull a one-second-old sample out of the tail end of the delay, and keep it in a temp.
On "odd" passes, put the one-second-old sample from the temp in the head end of the delay. Pull a one-second-old sample (which was already one second old) out of the delay. This is your two second delayed sample.
So in essence, you are using the one one-second delay memory and splitting it into two interleaved one-second delay memories, at half the sample rate. Much easier than doing it in hardware.
Of course, since you are down-sampling to 16KHz from 32KHz, you have the danger of aliasing signals that have content above 8KHz. That is easily solved with a low-pass filter before the signal goes in the delay. It may need to be more than a simple single-pole filter.
Let me know if this is helpful.
Use a variable to toggle between "even" and "odd" passes. (Start with the variable set to 1, negate it each pass, and test to pos or neg.)
On "even" passes, put your sample in the head end of the delay. Pull a one-second-old sample out of the tail end of the delay, and keep it in a temp.
On "odd" passes, put the one-second-old sample from the temp in the head end of the delay. Pull a one-second-old sample (which was already one second old) out of the delay. This is your two second delayed sample.
So in essence, you are using the one one-second delay memory and splitting it into two interleaved one-second delay memories, at half the sample rate. Much easier than doing it in hardware.
Of course, since you are down-sampling to 16KHz from 32KHz, you have the danger of aliasing signals that have content above 8KHz. That is easily solved with a low-pass filter before the signal goes in the delay. It may need to be more than a simple single-pole filter.
Let me know if this is helpful.
Don Stavely
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- Location: New Orleans, LA US
This is pretty interesting. I'm more interested in trying to get much longer times than that even. I realize it will be totally aliased and nasty, but thats ok with me. How might you implement the counter when doing something like 8 passes? I can imagine the code for SKP NEG and SKP GEZ when you're just toggling it between +1 and -1 each pass, but I'm not sure what to do for 8 passes. Any thoughts?donstavely wrote:Here is a way to get a two second delay without modifying the hardware:
Use a variable to toggle between "even" and "odd" passes. (Start with the variable set to 1, negate it each pass, and test to pos or neg.)
On "even" passes, put your sample in the head end of the delay. Pull a one-second-old sample out of the tail end of the delay, and keep it in a temp.
On "odd" passes, put the one-second-old sample from the temp in the head end of the delay. Pull a one-second-old sample (which was already one second old) out of the delay. This is your two second delayed sample.
So in essence, you are using the one one-second delay memory and splitting it into two interleaved one-second delay memories, at half the sample rate. Much easier than doing it in hardware.
Of course, since you are down-sampling to 16KHz from 32KHz, you have the danger of aliasing signals that have content above 8KHz. That is easily solved with a low-pass filter before the signal goes in the delay. It may need to be more than a simple single-pole filter.
Let me know if this is helpful.
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- Joined: Thu Jan 07, 2010 2:29 pm
- Location: Windsor, Colorado
I think it is just an extrapolation to a FOR-NEXT or DO-WHILE-type loop. You have to think about how the FV-1 runs through code on each pass:
IF loop counter variable is 0, THEN read an input sample and put it in the temp variable.
Put the temp variable in the head-end of the delay.
Get a delayed sample out of the tail end of the delay, put it in the temp variable.
Add 0.1 to the loop counter.
IF loop counter is > 0.8, THEN write the temp variable to the output, and reset loop variable to 0
Done.
The input (from ADC or another variable) is sampled every eighth pass. The output (to a DAC or another variable) is 8 seconds delayed, updated every eighth pass.
You can adjust the counter increments to get whatever number of interleaves you want, to get whatever delay length you want.
As you say, the sample rate in this case is 1/8th of the overall sample rate. To avoid aliasing, you can put a low-pass filter in front of the delay. (If you put it after the delay, the aliasing will have already happened, and you can't fix it)
IF loop counter variable is 0, THEN read an input sample and put it in the temp variable.
Put the temp variable in the head-end of the delay.
Get a delayed sample out of the tail end of the delay, put it in the temp variable.
Add 0.1 to the loop counter.
IF loop counter is > 0.8, THEN write the temp variable to the output, and reset loop variable to 0
Done.
The input (from ADC or another variable) is sampled every eighth pass. The output (to a DAC or another variable) is 8 seconds delayed, updated every eighth pass.
You can adjust the counter increments to get whatever number of interleaves you want, to get whatever delay length you want.
As you say, the sample rate in this case is 1/8th of the overall sample rate. To avoid aliasing, you can put a low-pass filter in front of the delay. (If you put it after the delay, the aliasing will have already happened, and you can't fix it)
Don Stavely
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Hmm, but since the FV-1 doesn't have IF or THEN, I'd have to do something like Frank talked about here.
Could this be stretched indefinitely? I play bass, and it would be neat to be able to loop bass notes. The highest fundamental of the lowest octave of standard bass tuning only goes up to 82hz. So in theory, could I bring the effective sampling rate down to around 1000hz, giving 32 seconds of loop time, and put a 4-pole lowpass at the beginning of the effect before the delay line? Any reason that it would break down if I tried to go that extreme with it?
Could this be stretched indefinitely? I play bass, and it would be neat to be able to loop bass notes. The highest fundamental of the lowest octave of standard bass tuning only goes up to 82hz. So in theory, could I bring the effective sampling rate down to around 1000hz, giving 32 seconds of loop time, and put a 4-pole lowpass at the beginning of the effect before the delay line? Any reason that it would break down if I tried to go that extreme with it?
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What I posted was meant to be an outline of the algorithm in computer-english (pseudocode, as we call it in the biz). You need to flesh it out to FV-1 code, so it looks like:
I tested it, and it works. Pretty buzzy without the filters, though. I am sure that it can be optimized to shorten it a little - I just wanted to code it exactly according to the pseudocode.
Code: Select all
; This example code delays an input by eight seconds.
; It inteleaves the signal 8 ways in a single max sized delay
equ input reg0
equ loop reg1
equ temp reg2
equ output reg4
mem delay 32767
; Get input, filter it to avoid aliasing (not shown)
rdax adcl, 1
; (filter here)
wrax input, 0
; IF loop counter variable is 0, THEN read an input sample and put it in the temp variable.
rdax loop, -1
skp neg, NotZro
ldax input
wrax temp, 0
NotZro:
; Put the temp variable in the head-end of the delay.
ldax temp
wra delay, 0
; Get a delayed sample out of the tail end of the delay, put it in the temp variable.
rda delay+32767, 1
wrax temp, 0
; Add 0.1 to the loop counter.
ldax loop
sof 1, 0.1
wrax loop, 1
; IF loop counter is > 0.8, THEN write the temp variable to the output, and reset loop variable to 0
sof 1, -0.8
skp neg, Done
ldax temp
wrax output, 0
wrax loop, 0
Done:
; Done, write output (you really need to filter it again here)
ldax output
wrax dacl, 1
wrax dacr, 0
Don Stavely
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