PCB
Moderator: frank
PCB
Hey guys I'm working on a printed circuit board for the FV-1 chip. First question is does a whole layer have to be dedicated to a ground layer or just the area beneath the chip. Also, can I run traces through the ground layer(not connected directly to the layer) with no problems?
In general, a nice ground plane can always help an audio PCB. Also short trace in the ground plane are not too bad but long ones may cause a problem if run near sensitive components or lines. Basically, if you think a trace may be a problem, move it. It may not have been but better to err on the side of caution and make a killer board first run.
Frank Thomson
Experimental Noize
Experimental Noize
Hi Brandon,
I suggest you to make as many as possible traces on the TOP layer, and keep the GND layer area on the BOTTOM layer as large as possible. Locate the XTAL as close as possible to the FV-1 pins and minimize lenght of its traces.
Place 15 pF capacitor between X2 pin and GND. Do not use too large power supply capacitors. Otherwise you can have problems with FV-1 startup.
By the way: I suggest you to place two serial EEPROMS on the board banked by an inverter in their A0 pine. That will give you possibility to having 16 own programs. I plan to design such daughter board.
I suggest you to make as many as possible traces on the TOP layer, and keep the GND layer area on the BOTTOM layer as large as possible. Locate the XTAL as close as possible to the FV-1 pins and minimize lenght of its traces.
Place 15 pF capacitor between X2 pin and GND. Do not use too large power supply capacitors. Otherwise you can have problems with FV-1 startup.
By the way: I suggest you to place two serial EEPROMS on the board banked by an inverter in their A0 pine. That will give you possibility to having 16 own programs. I plan to design such daughter board.
Aion, thanks for your help.
I like the serial EEPROM idea. My customer however only wants four(makes my life easier
) but it could be used for a later date. I'm an analog guy at heart so always nice to have someone chime in with ideas like this. What would my logic look like for this, as I can imagine you'd have to switch between the EEPROMS.
Thanks for the PCB advice, I'm new to ground planes(wow do they make life easier) so the help is nice.
Already did the capacitor to X2 trick, and I plan on following the supply caps given in the development board schematic.
I like the serial EEPROM idea. My customer however only wants four(makes my life easier
) but it could be used for a later date. I'm an analog guy at heart so always nice to have someone chime in with ideas like this. What would my logic look like for this, as I can imagine you'd have to switch between the EEPROMS. Thanks for the PCB advice, I'm new to ground planes(wow do they make life easier) so the help is nice.
Already did the capacitor to X2 trick, and I plan on following the supply caps given in the development board schematic.
Actually you just need to flip the A0 pin on each eeprom. The eeprom with A0 tied to gnd (other one must be tied to +3.3) will be the "active" one. The clock and data lines can be tied together as only the active eeprom will respond on the data line.
Easy way is a SPDT switch and 2 resistors. Tie A0 from each EEPROM to 3.3 through a resistor (one for each eeprom) and connect the A0 pins from the EEPROMs to the SPDT switch so one is pulled to gnd or the other is pulled to gnd depending on switch position (SPDT center tied to gnd).
Easy way is a SPDT switch and 2 resistors. Tie A0 from each EEPROM to 3.3 through a resistor (one for each eeprom) and connect the A0 pins from the EEPROMs to the SPDT switch so one is pulled to gnd or the other is pulled to gnd depending on switch position (SPDT center tied to gnd).
Frank Thomson
Experimental Noize
Experimental Noize