Spin Semiconductor

Being new and still trying to wrap me head around all this. I'm wondering if prototype code exists or on a high level, how a granular processor could be implemented.

I envision small samples, pot defined 1 to 1000 ms long, and completely rearranging the delay memory access by ramdom accessing locations or addressing them with mutually modulating chaos LFOs, pot defined speed.
Then you would essentially be jumbling random delay locations, possibly generating all sorts of weird sound artifacts if interpolating (CHO) between tiny, non contigous delay memory, and each bit being spit out to the DAC in 'random' pan positions.

Does this make sense, is something like this possible?
Thanks a ton.

I suppose you could do something like this though I never have. Start with a flow chart of what you want to happen and see if you can map instructions on to it, if you have trouble post it here and we can look it over and make suggestions.

Thank you Frank. I'll study up a bit and post when i have something worth troubleshooting.
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Wish I could be more help on this one but I've never programmed a granular processor. So seeing your flowchart will help me understand the structure then I can help map it to instructions.