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Modulating clock frequency - safe?

Posted: Mon Nov 22, 2010 10:51 pm
by livingston
I had an idea about modulating the clock frequency of the chip as a workaround for the 3-pot limit.

Say we have a delay program happening, and we send a varying clock to the clock pin. Would this act to modulate the delay time, giving vibrato/chorus type effects?

I see in the knowledge base that this is addressed and it seems to indicate that this is an ok idea. I was just curious if there are any things to watch out for, and whether this will actually have the effect I'm after. The oscillator in the knowledge base says 20khz-60khz, but it was my understanding that we shouldn't exceed 48k or so, is that still correct?

Posted: Tue Nov 23, 2010 12:09 am
by frank
The trick is to make sure the clock changes smoothly, no jumping from one rate to another or cause a clock cycle to be deformed, i.e. a change in rate causing the high time of a cycle to be more like a spike rather than a nice normal high time. I recommend 50KHz for normal production but for custom builds you can run faster and speed grade the parts to make sure they work at a higher speed. Just make one of your devices with a socket and test the part operates at least 10% over what you need to allow for temp and other variations.

Posted: Sat Nov 27, 2010 12:16 pm
by livingston
Well, I tried it and it works very well, using the inverter oscillator shown in the knowledge base.

I do need to figure out how to adjust the values to get a range from 16k-50k instead of 20k-60k. I normally simulate analog stuff in Falstad's realtime simulator, but this doesn't have the ability to count frequencies this high. The circuit is working just fine with the values shown, but I'd like to follow your suggestion and be on the safe side. Guess it's time for a real oscilloscope...

Edit: just hooked up my cheapo digital scope, and it seems to do the job.

According to my scope, this oscillator is actually giving 25k-70k range. Not hard to believe due to potentiometer tolerance being so bad. But the FV1 seems to be handling 70k just fine. Is this a fluke, or are my readings likely false?

Posted: Sat Nov 27, 2010 4:46 pm
by frank
I can believe 70K, I designed the digital part very conservatively to handle wide variations in process shift at the fab. The converters are the parts that may have trouble at high clock frequencies due to process shifts, they are more sensitive to capacitor variation. We actually ran parts to 90KHz, even a few to over 100KHz during initial test runs.

Posted: Sun Nov 28, 2010 12:46 am
by livingston
So what would happen at the point at which the chip can't handle the clock rate? Are we talking death of the FV1, no sound, weird artifacts...? I'm not going to try to push it, just curious what the consequence would be.

Posted: Sun Nov 28, 2010 11:13 am
by frank
If I recall correctly it just starts to sound terrible (pops, cracks, noise, etc.), shouldn't damage the part if you push it that far for a short period. We never ran it long at that rate, it was to prove to us we could handle wide process shifts.