Instructions of SpinASM

[edwillys]

Hello all,

I have a few doubts about some instructions and concepts of the FV1 chip. Specially concerning the arguments allowed. All of the following expressions are compiled without error and I'm not really sure what they represent nor if they are functional.

1)

mem delay 200
equ foo reg0

cho rda,sin0,sin,delayˆ+foo +1

2)
mem delay 200

rdax delay,0.5
wrax delay,0.0

3)

Is there any particular reason why the LDAX function is not shown on the website?

4)
In the AN1001 the formula for the LFO range is shown as Ka=N*32767/16385, or approximately 2*N. That is, the max amplitude is the double of the number of samples. Shouldn't it be on te other way round? Shouldn't it N/2 so that the all range sweep would cover twice the amplitude of the memory, that is, 2*N/2 = N?


Are my thoughts clear enough? =)

Best regards,

Edgar

[frank]

1)

mem delay 200
equ foo reg0

cho rda,sin0,sin,delayˆ+foo +1

The assembler is very simple, basically all the tokens (delay, foo, etc.) are converted to numbers and as long as the numbers are in range then the instruction will compile. This can lead to odd looking code like you show that will still compile and run. It may not work the way you think, for example the above code will add the address of reg0 (foo) to the middle address of delay, it will not add the contents of reg0.

2)
mem delay 200

rdax delay,0.5
wrax delay,0.0

You can read and write to any point in a delay line, it may even be desired to do something like you show in some case.

3)

Is there any particular reason why the LDAX function is not shown on the website?

It is a pseudo instruction, that is it is an alias for another instruction. For example "clr" I believe maps to "sof 0,0" so there is no real "clr" instruction. As a result it is possible we added ldax after writing the page on the web site.

4)
In the AN1001 the formula for the LFO range is shown as Ka=N*32767/16385, or approximately 2*N. That is, the max amplitude is the double of the number of samples. Shouldn't it be on te other way round? Shouldn't it N/2 so that the all range sweep would cover twice the amplitude of the memory, that is, 2*N/2 = N?

The equations are directly derived from the hardware design, and there are many ways to do digital LFOs and to optimize the circuit design. The SIN and COS calculation circuitry is shared with the amplitude calculation circuitry so the way the coefficients align internally may seem a little different than what you expect but it resulted in a more efficient design and smaller and lower cost IC.

[edwillys]

Hello Frank,

First of all thanks for you quick reply. You cleared my thoughts except for one =)

Concerning the delay lines what would be the difference between

mem delay 200

rdax delay,0.5
wrax delay,0.0

and

mem delay 200

rda delay,0.5
wra delay,0.0

Thanks

[frank]

Hello Frank,

First of all thanks for you quick reply. You cleared my thoughts except for one =)

Concerning the delay lines what would be the difference between

mem delay 200

rdax delay,0.5
wrax delay,0.0

This first one would not work as expected. The rdax and wrax commands are used for registers not delay memory, this line happens to compile because "delay" is assigned the address 0 ("mem" statements are allocated memory in the order encountered and start at address 0) and address 0 is also a valid register address. So this would compile but would be wrong. This is one of the limits of SpinAsm.

Sine you are reading and writing the same location this may sound like it is working but as soon as you tried to read from the tail of the delay line you would see problems.

mem delay 200

rda delay,0.5
wra delay,0.0

Thanks

This is the proper way to define and access a delay line in the delay memory with rda and wra. Note you are reading and writing the head of the line, not reading from the tail of it the way this is written.

[livingston]

I have always wondered about the purpose of the LDAX code. I can see why it might be useful in terms of writing and reading code to have "CLR" instead of using "SOF 0,0". But I'm not sure why it would ever be more useful to use LDAX than RDAX x,k. Is this just an "it's there, so use it if you want to" kind of thing?

[slacker]

Using LDAX just means you don't need to worry about what was in the accumulator from the previous instruction. I use it as a fail safe, in the event that I've not cleared the accumulator with the previous instruction.

Or like the example on the website, there might be times when it saves you a line of code.
http://www.spinsemi.com/knowledge_base/ ... nstruction

[edwillys]

Hello all,

One other question. I saw that in the phase shifter example you write:

cho rda,RMP1,NA,temp

Does that mean that you can pass any register as an address argument to the cho rda instruction and not only MEM declarations?

Thanks

[frank]

No, it must be a mem. How was "temp" defined?

[edwillys]

Hmmm, interesting. It's defined as a mem 1. I didn't know it was possible to use delay memory as a normal register, mainly because of the internal up counter...

[frank]

Hmmm, interesting. It's defined as a mem 1. I didn't know it was possible to use delay memory as a normal register, mainly because of the internal up counter...

Since it is a temp location we can get away with it, we write to it and read from it in the same program cycle and don't expect it to survive from one cycle to the next. The counter only changes once per sample period and that occurs between instructions 127 and 0 (when we roll over to start the program again) so the location is stable for the duration of a program cycle.

[edwillys]

another one:

consider the code below:

clr
CHO RDA,SIN0,SIN|COMPC|REG; (1)
...
...
...
...
clr
CHO RDAL,SIN0; (2)


Will the result in the acc after the line (2) be the same as after the line (1)? I mean, does the intrution CHO RDAL read the value from REG or from SIN0?

Thanks

[frank]

No, they will not be the same, the "CHO RDA" will read a value from the delay RAM, the sine wave is added to the memory address and the value from memory is multiplied by the sine wave fractional portion.

"CHO RDAL" will put the value of the sine wave in ACC.

[edwillys]

I see, so, waht exactly is stored on the REG? The CHO SOF function has a REG argument as well except that it doesn't access the delay memory.

[frank]

The REG causes the selected SIN or COS wave to be stored in a register in the LFO block, this is because the SIN/COS are continually updating and to use it in a chorus you don't want the value to change so the first CHO instruction includes a REG statement and the following ones for that operation do not as they will use the value in the register. Things like COMPA and COMPC occur after the register so they all operate on the same value.