Envelope controlled tremolo with slight chorus - fixed

Algorithm development and general DSP issues

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Digital Larry
Posts: 338
Joined: Mon Nov 12, 2012 1:12 pm
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Envelope controlled tremolo with slight chorus - fixed

Post by Digital Larry »

[Edit - it's been fixed! ]


This is a mono patch.

Tremolo speeds up with louder signal then slows down as it decays.

Little chorus on the output. POT2 controls it over a fairly small range.

Edit - I have added the comma after RDA in the CHO line, per schrab's reported error.

Code: Select all

RDAX 20,1.0
ABSA
RDFX 33,0.01
WRAX 33,0.0
RDAX 34,1.0
SOF -0.01,0.0
RDAX 34,1.0
WRAX 32,0.0
RDAX 33,1.0
MAXX 32,1.0
WRAX 34,0.0
RDAX 34,1.0
SOF 1.7659574468085106,0.17
WRAX 35,0.0
SKP RUN,3
WRAX 37,0.0
SOF 0.0,-1.0
WRAX 38,0.0
RDAX 37,0.001
MULX 35
RDAX 38,1.0
WRAX 38,-0.001
MULX 35
RDAX 37,1.0
WRAX 37,1.0
MULX 20
WRAX 36,0.0
RDAX 18,1.0
SOF -0.48,0.59
WRAX 39,0.0
RDAX 18,1.0
SOF 0.19,0.18
WRAX 40,0.0
SKP RUN,1
WLDS 1,12,999
CLR
RDAX 40,1.999
SOF 1.9999,0.0
SOF 0.002,0.0
RDAX 44,0.998
WRAX 44,0.0
RDAX 40,0.05
SOF 0.002,0.0
RDAX 42,0.998
WRAX 42,0.0
RDAX 39,1.0
MULX 17
MULX 17
SOF 0.3,0.01
WRAX 2,0.0
RDAX 39,1.0
SOF -0.5,0.999
WRAX 45,1.0
MULX 45
MULX 45
MULX 45
MULX 42
SOF 0.002,0.0
RDAX 43,0.998
WRAX 43,1.0
WRAX 3,0.0
RDAX 36,1.0
WRA 0,0.0
CHO RDA,1,06,1000
CHO RDA,1,00,1001
MULX 44
RDAX 36,1.0
WRAX 41,1.0
RDAX 41,0.5
SOF 0.002,0.0
RDAX 41,1.0
WRAX 22,0.0
RDAX 41,1.0
WRAX 23,0.0
Last edited by Digital Larry on Sun Apr 28, 2013 1:51 pm, edited 5 times in total.
schrab
Posts: 7
Joined: Mon Feb 04, 2013 11:01 am

Post by schrab »

Yo, Larry!
There's something wrong with code

Code: Select all

<0002>[ Pass 2] [ 1002] Line: 64  "CHO RDA 1,06,1000 "  - ERROR:Operand or comma  missing  - Operand 4
<0003>[ Pass 2] [ 1020] Line: 65  "CHO RDA 1,00,1001 "  - ERROR:Invalid Expression - CHO Subinstruction Only 'RDA','WRA','SOF' or 'RDAL' Allowed
<0004>[ Pass 2] [ 1002] Line: 65  "CHO RDA 1,00,1001 "  - ERROR:Operand or comma  missing  - Operand 4
Same with "overdrive chorus reverb", "pingpong delay chorus" and "stereo ringmod with chorus" algorithms.

UPD: seems like there's comma missing after RDA
Digital Larry
Posts: 338
Joined: Mon Nov 12, 2012 1:12 pm
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Post by Digital Larry »

Oh thanks! Glad somebody's trying it out. When I print T-shirts, you get a free one. :D

See, I TOLD you we needed some QA. Time to update your resume.
schrab
Posts: 7
Joined: Mon Feb 04, 2013 11:01 am

Post by schrab »

I've tried all your six algorithms.
Still cant't get this and "stereo tremolo" to work - no sound at both outputs. Does it work with your hardware?
Your other algorithms works well.
Digital Larry
Posts: 338
Joined: Mon Nov 12, 2012 1:12 pm
Contact:

Post by Digital Larry »

Hi schrab,

:oops:

I've just been using the built in simulator up to now, but one thing I noticed in these patches that use the ring mod block (including the tremolo) is that you need to move the pots a little in order to get the LFO started. I won't have time to hook up my dev board until this weekend and maybe not even then.

Give those pots a little jostle and let me know if it helps?

Edit: Also, this looks like it uses left input only (register 20).

Thanks,

DL
Last edited by Digital Larry on Wed Apr 24, 2013 8:40 pm, edited 1 time in total.
Mcfly
Posts: 46
Joined: Fri Mar 08, 2013 2:38 pm
Location: Argentina

Envelope controlled tremolo with slight chorus

Post by Mcfly »

Hey Larry, Is there any chance to hear a reverse delay using the spinCAD?
Digital Larry
Posts: 338
Joined: Mon Nov 12, 2012 1:12 pm
Contact:

Post by Digital Larry »

Hi Mcfly,

If someone can point me to a reverse delay using Spin ASM, I can turn it into a SpinCAD block.

Thanks,

DL
schrab
Posts: 7
Joined: Mon Feb 04, 2013 11:01 am

Post by schrab »

Haven't seen complete reverse delay algorithms but there's good working Reverse Reverb by Malekko (found it at TipTop audio's site)

Code: Select all

;Reverse reverb

;pot0 = predelay
;pot1 = decay time
;pot2 = damping

;fixed reverse tapped delay

;memory locations:

mem	pdel	9900	;300ms
mem	rdel	18000
mem	ap1	1234
mem	ap2	957
mem	ap3	765
mem	ap4	321

;register equates:

equ	f1	reg0
equ	f2	reg1
equ	f3	reg2
equ	f4	reg3
equ	pdlo	reg4
equ	dfil	reg5
equ	kfil	reg6

;this is tough, as we really want to change the tap positions, 
;which is computationally intensive

;gather inputs:

rdax	adcl,0.5		;get left input
rdax	adcr,0.5		;get right input
wra	pdel,0		;write predelay input

;get predelay output into pdlo:

rdax	pot0,0.3		;get pot0 (to 0.3 of memory range)
rdfx	dfil,0.001	;filter delay control
wrax	dfil,1		;write delay control filter
wrax	addr_ptr,0	;write to address pointer
rmpa	1		;read delay from address pointer
wrax	pdlo,0		;write result to pdlo
wra	rdel,0		;clear reverse delay input

;now write the pdlo register to the reverse delay, depending on pot1:

rdax	 pot1,1
skp	zro,wr1
sof	1,-0.125
skp	neg,wr2
sof	1,-0.125
skp	neg,wr3
sof	1,-0.125
skp	neg,wr4
sof	1,-0.125
skp	neg,wr5
sof	1,-0.125
skp	neg,wr6
sof	1,-0.125
skp	neg,wr7
skp	run,wr8

wr1:
ldax	pdlo
wra	rdel+14000,0
skp	zro,wr9

wr2:
ldax	pdlo
wra	rdel+12000,0
skp	zro,wr9

wr3:
ldax	pdlo
wra	rdel+10000,0
skp	zro,wr9

wr4:
ldax	pdlo
wra	rdel+8000,0
skp	zro,wr9

wr5:
ldax	pdlo
wra	rdel+6000,0
skp	zro,wr9

wr6:
ldax	pdlo
wra	rdel+4000,0
skp	zro,wr9

wr7:
ldax	pdlo
wra	rdel+2000,0
skp	zro,wr9

wr8:
ldax	pdlo
wra	rdel,0			

wr9:

;prepare filter coefficient from pot2:

rdax	pot2,1
sof	0.8,0.1		;treble increases CW
wrax	kfil,0

;do reverse reverb taps with interspersed filtering and allpasses:

rda	rdel+1,0.05
rda	rdel+303,-0.05
rda	rdel+569,0.06
rda	rdel+911,0.07
rda	rdel+1256,-0.008
rda	rdel+1478,0.008
rda	rdel+1818,-0.01
rda	rdel+2089,0.01
rda	rdel+2358,-0.011
rda	rdel+2710,0.012
rda	rdel+3018,0.0135
rda	rdel+3345,-0.012
rda	rdel+3567,-0.015
rda	rdel+3922,0.02
rda	rdel+4167,-0.02

rdax	f1,-1
mulx	kfil
rdax	f1,1
wrax	f1,1
rda	ap1#,0.5
wrap	ap1,-0.5

rda	rdel+4522,-0.029
rda	rdel+4754,0.04
rda	rdel+5156,-0.034
rda	rdel+5342,-0.04
rda	rdel+5657,0.035
rda	rdel+6008,0.04
rda	rdel+6283,-0.04
rda	rdel+6623,-0.045
rda	rdel+6845,-0.055
rda	rdel+7219,0.06
rda	rdel+7487,-0.06
rda	rdel+7832,-0.05
rda	rdel+8065,0.07

rdax	f2,-1
mulx	kfil
rdax	f2,1
wrax	f2,1
rda	ap2#,0.5
wrap	ap2,-0.5

rda	rdel+8404,0.08
rda	rdel+8713,-0.07
rda	rdel+8967,-0.08
rda	rdel+9307,0.08
rda	rdel+9576,-0.09
rda	rdel+9924,-0.09
rda	rdel+10298,-0.11
rda	rdel+10578,0.1
rda	rdel+10835,0.12
rda	rdel+11207,-0.1
rda	rdel+11523,-0.14
rda	rdel+11765,-0.18
rda	rdel+12113,0.16
rda	rdel+12324,-0.13
rda	rdel+12735,-0.17

rdax	f3,-1
mulx	kfil
rdax	f3,1
wrax	f3,1
rda	ap3#,0.5
wrap	ap3,-0.5

rda	rdel+13003,0.19
rda	rdel+13267,-0.14
rda	rdel+13610,0.16
rda	rdel+13945,-0.18
rda	rdel+14130,0.2
rda	rdel+14550,-0.25
rda	rdel+14800,-0.25

rdax	f4,-1
mulx	kfil
rdax	f4,1
wrax	f4,1
rda	ap4#,0.5
wrap	ap4,-0.5

rda	rdel+16000,1
wrax	dacl,1
wrax	dacr,0
Larry, my 5 cents to wishlist: tap tempo snippet
FV-1 is the only way to make DIY DSP tap tempo delay so i think it's quite important.
Digital Larry
Posts: 338
Joined: Mon Nov 12, 2012 1:12 pm
Contact:

Post by Digital Larry »

OK, well the initial goal of the SpinCAD system is to check the basic operation of the CAD system itself works great. As time goes on more blocks can be added but my goal is to explain how this can be done in Java (so I'm not the only one doing it!). Hold that thought!

I'm also more interested in small code blocks because some of these (like some reverbs and phaser) are so huge code wise that hardly anything else fits.
schrab
Posts: 7
Joined: Mon Feb 04, 2013 11:01 am

Post by schrab »

Understand.
you need to move the pots a little in order to get the LFO started.
not working in my case :cry:
Digital Larry
Posts: 338
Joined: Mon Nov 12, 2012 1:12 pm
Contact:

Post by Digital Larry »

Sorry about the trouble, will investigate...
Digital Larry
Posts: 338
Joined: Mon Nov 12, 2012 1:12 pm
Contact:

Post by Digital Larry »

I still haven't connected up my dev board, but the main thing that comes to mind is that the LFOs maybe aren't working.

Look for these lines:

RDAX 37,0.001
MULX 35
RDAX 38,1.0
WRAX 38,-0.001


Change the +/- 0.001 to +/- 0.02. I took that block of code from a ring modulator example elsewhere on this forum. In that example, the value is +/- 0.02.

If the LFO does work, it will probably be too fast for tremolo, but try different values and see what happens.
schrab
Posts: 7
Joined: Mon Feb 04, 2013 11:01 am

Post by schrab »

Changed in both alogorithms with no results.
Digital Larry
Posts: 338
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Post by Digital Larry »

OK I've traced the issue to a problem in the tremolo code. However for the life of me I cannot seem to locate the issue.

Here's the ring mod code that Frank wrote, which I am using for the ringmod/trem block:

Code: Select all

;POT0 : Control frequency 
; 
equ s reg0 
equ c reg1 

;Then initialize the oscillator by setting one to xero and the other to -1 
;we do this just once, during the first cycle of operation 

skp run,endset ;do not execute if already running 
wrax s,0 ;set s to 0, (acc should be zero) 
sof 0,-1 ;set accum to -1 
wrax c,0 ;write to c 
endset: ;jump-to label 

;Now do the LFO, using pot0 as a control for frequency 

rdax s,0.001 ;read the s register, change this value between  0.001 and 1.0 
mulx pot0 ;multiply by pot value 
rdax c,1 ;read the c register 
wrax c,-0.001 ;integrate the c value, this value MUST be the negative of 
;what ever you set the value in 'rdax s,X' to above 
mulx pot0 ;multiply by pot value 
rdax s,1 ;read s reg 
wrax s,1 ;integrate the s value 

;Either the s or c register will be producing s waveforms (just shifted in 
;phase), so either can be used as a modulation source. The maximum 
;frequency of this LFO is Fs/2pi, which should be high enough! 

mulx adcl 

;and output the result 

wrax dacl,0 
And here is the code that SpinCAD spits out for a single ringmod block coming from the left input, controlled by POT0, going to both outputs. Comments added by me:

Code: Select all

SKP 10,4
CLR   ; I added the CLR to be sure the accumulator was 0
WRAX 33,0.0 ; this is using reg1 (33) instead of reg0 for s - shouldn't matter
SOF 0.0,-1.0
WRAX 34,0.0 ; using reg2 (34) instead of reg1 for c - again, shouldn't matter
RDAX 33,0.001 ; read s, scale by LFO factor
MULX 16           ; 16 = POT0
RDAX 34,1.0     ; c = reg2 (34)
WRAX 34,-0.001
MULX 16
RDAX 33,1.0
WRAX 33,1.0
MULX 20          ; multiply by ADCL
WRAX 32,0.0    ; here's where it gets a little different because the blocks
RDAX 32,1.0     ; use registers for their output results - a little inefficient
WRAX 22,0.0
RDAX 32,1.0
WRAX 23,0.0
Any sharp eyes see the problem? Top example works. Bottom example doesn't.

The only things I see are:
1) I have used different registers for the LFO than in Frank's example.
2) I put the output of the multiply into a register which I then read and write to the DAC outs instead of writing it directly.
3) I explicitly clear the accumulator in the LFO setup stage.
Digital Larry
Posts: 338
Joined: Mon Nov 12, 2012 1:12 pm
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Post by Digital Larry »

I'll give you a hint. It's the first instruction.
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