Spin Semiconductor

Why is it the sample echo program distorts as you turn the echo time pot? Does it have to do with address values being inexact after being multiplied by POT1?

Also, is there any reasoning to the values chosen for the min and max positions in the delay line? I can't seem to figure it out.

And one more question - what's the reason for shifting the delay address in the ACC?

Yes, you can expect some distortion as the pointer is moved through the delay. It should go away when the pointer settles.

I believe the original values were selected to give a delay from 150mS to just over 500mS. at 32K sample rate Not critical, just sounded good.

On the shifting, if you mean why is the address mapped to bits 22:8, this is so you have 8 fractional address bits for finer resolution if necessary.