Spin Semiconductor

I just came across this article:

http://www.effectsbay.com/2014/05/fcc-r ... or-pedals/

$450K is a pretty significant penalty.

Any tips for designing circuits with the FV-1 that would be compliant with the FCC regulations? Obviously, the circuit itself would have to be tested - just wondering if people have advice that would enable the circuit to pass the tests.

Thanks,

Sean Costello

With a chip like the FV-1 keep high speed lines close to the chip, so that means the crystal and the EEPROM if used. The closer the better.

Minimum 2 layer board, solid ground under the high speed devices and traces.

Conductive enclosure.

Smart layout, don't be afraid to rip apart a layout if it starts to have lots of vias. Vias are bad on high speed lines and they break up the ground plane.

Thanks, Frank!

Sean Costello

Great question Sean, thanks for bringing this one up.