Modulation Delay

[frotaitalos]

Hi Guys, I'm trying to create a modulated delay, at first I used an lfo to interpolate the delay value but with that I get a "zip" noise along with the modulation, now I'm trying to catch the delay signal and modulate it, but it does not work as it should: / . can anybody help me?

Code: Select all

;------ LFO 0
SKP RUN ,1
WLDS 0,146,17088
SOF    0,0.08
WRAX SIN0_RATE,0
MULX POT2
WRAX SIN0_RANGE,0

;-------DELAY
CLR
OR $007FFF00
MULX POT0
RDFX REG5,0.0012500000
WRAX REG5,1.0000000000
WRAX ADDR_PTR,0.0000000000
RMPA 1.0
WRAX REG4,0.0000000000

;-------MODULATION
RDAX REG4,1; read in delay output
WRA chorus, 1.0  ; and write to chorus delay
CHO RDA, SIN0, SIN|REG|COMPC, chorus + 400  ; standard sine chorus
CHO RDA, SIN0, SIN, chorus + 401 ; sine chorus part 2
WRAX REG8,0.0000000000 ; write chorus output back to output mixer

;-------MIX
RDAX REG8,1
RDAX ADCL,1
WRAX DACL,0

The code is not complete, but the important parts are above

[Aaron]

Something like this should work:

Code: Select all

mem	del	31120
mem	mod	1311

equ	lpf	reg0



skp	run,1
wlds	0,12,239			;init sin0 lfo ~0.5Hz

ldax	pot0				;read pot0
sof	0.9,0.05			;scale 50ms to 950ms 
rdfx	lpf,0.001			;low pass filter pot ~ 5Hz 
wrlx	lpf,-1				;
wrax	addr_ptr,0			;save to address pointer

rmpa	1				;read sample from delay memory pointed to by addr_ptr
wra	mod,1				;write to mod memory
mulx	pot1				;mutiply by pot1 for feedback control
rdax	adcr,1				;add input
wra	del,1				;write to delay memory

cho	rda,sin0,sin|reg|compc,mod^	;modulate delay using sin0
cho	rda,sin0,sin,mod^+1		;
wrax	dacr,0				;write to output