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Output pin levels

Posted: Sat Sep 20, 2008 7:26 am
by mdroberts1243
Can I depend on the output pin DC level? I would like to encode a DC offset in the output pin. How accurate is the VDD/2 biasing? Can I reference the VDD/2 bias level on any of the external pins of the chip?

Thanks,

Posted: Mon Sep 22, 2008 9:37 am
by frank
The outputs go down to DC, but the possible offset is a non-critical parameter, so you could expect the offset to be +/-100mV from Vdd/2, and +/- 50mV from the MID terminal. I would expect the differential output from both channels to be +/- 10mV though, which is probably the best chance, but not a tested parameter.

Posted: Mon Sep 22, 2008 2:36 pm
by mdroberts1243
frank wrote:The outputs go down to DC, but the possible offset is a non-critical parameter, so you could expect the offset to be +/-100mV from Vdd/2, and +/- 50mV from the MID terminal. I would expect the differential output from both channels to be +/- 10mV though, which is probably the best chance, but not a tested parameter.
Cool! Thanks for the response.

Maybe I can use the two channels differentially and reduce the impact on headroom for my 'DC Offset' encoding.

Thanks,