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Roast my delay

Posted: Mon Dec 18, 2023 7:53 am
by agsilvio
Hi team,
My first hand-coded project is a simple delay. I am very new to DSP programming. I've put the code here. Please, critique it and let me know what best-practices I am missing. I already want to improve it by putting a low-pass filter on the Time adjustment (recently learned in another thread).

Code: Select all

del1	mem	32767

skp 	run,	START

START:

;put pot0 in ADDR_PTR
sof	0,0
RDAX pot0,1
WRAX ADDR_PTR,0

;clear accumulator
sof	0,0

;delay
rdax	adcr,1.0
wra	del1,1.0
RMPA 1
MULX pot2 ; decay remainging volume further based on POT2
wra	del1,1.0 ; write delayed sound to start of delay ram again (repeats)
RMPA 1
MULX pot1 ; set 'volume' of delay signal in ACC based on POT 1



; add original signal at full volume
rdax	adcr,1.0

wrax	dacr,0

Re: Roast my delay

Posted: Mon Dec 18, 2023 7:47 pm
by frank
OK, I'll start:
agsilvio wrote: Mon Dec 18, 2023 7:53 am

Code: Select all

skp 	run,	START

START:

Waste of an instruction, since you are not doing anything between the "skp' and "START:" there is no need for the skp or the START: label.

Re: Roast my delay

Posted: Tue Dec 19, 2023 12:51 am
by Sweetalk

Code: Select all

WRAX ADDR_PTR,0

;clear accumulator
sof	0,0/code]

This one also is a waste of an instruction, the accumulator is already cleared with the WRAX instruction, so you can delete it from the code. Besides from that the code will work, now you can start adding little things to it, step by step and start experimenting and learning.

Re: Roast my delay

Posted: Mon Feb 19, 2024 9:55 pm
by smear
agsilvio wrote: Mon Dec 18, 2023 7:53 am

Code: Select all

;delay
rdax	adcr,1.0
wra	del1,1.0
RMPA 1
MULX pot2 ; decay remainging volume further based on POT2
wra	del1,1.0 ; write delayed sound to start of delay ram again (repeats)
RMPA 1
MULX pot1 ; set 'volume' of delay signal in ACC based on POT 1
You leave the input signal in the accumulator after writing to the delay for the first time (note the coefficient after del1).