Chip Internals Help Needed
Posted: Wed Dec 10, 2008 7:31 pm
I'm trying to better understand the LFOs in the FV-1. Specifically what is happening behind the scenes. Does the SIN LFO get updated every sample? What is the resolution of it? For instance, if I set a very slow speed (0.2Hz or something) will I hear steps or does it calculate a new value for each audio sample?
Same for the ramp LFO... what kind of resolution does it generate?
I've been working on an FV-1 emulator for faster developing and testing of FV-1 programs on a PC. All parts of my "chip" except the LFOs are working, but I want to make sure that I model the LFOs properly. Any help would be appreciated.
Also, apparently the delay memory is not 24 bits. How is it actually encoded? I want to be sure to model this properly as well.
Same for the ramp LFO... what kind of resolution does it generate?
I've been working on an FV-1 emulator for faster developing and testing of FV-1 programs on a PC. All parts of my "chip" except the LFOs are working, but I want to make sure that I model the LFOs properly. Any help would be appreciated.
Also, apparently the delay memory is not 24 bits. How is it actually encoded? I want to be sure to model this properly as well.