State of I2C question

Peter Snowberg · Post by **Peter Snowberg** » Thu Nov 02, 2006 1:06 am

I have a question about the state of the I2C pins during normal operation. I don't have the eval board (yet) and I don't see schematics for it on the Spin site, but what I'm designing is functionally similar.

I presume that any change of the S0-S2 pins when T0 is high causes the FV-1 to start downloading the selected program into internal RAM and after that the E2PROM is sitting idle. Can I reprogram the E2PROM without interference while it is still connected to the FV-1 when the FV-1 is running from internal memory?

Also, the datasheet is very clear that T1 must be grounded for normal operation, but can anybody comment about the actual function of the T1 input?

Thanks for a very cool chip!

-Peter Snowberg

frank · Post by **frank** » Thu Nov 02, 2006 11:39 am

Hi Peter,

The 2-wire interface pins on the FV-1 use internal pull-ups so as long as the FV-1 is not accessing the EEPROM you should be able to read/write the EEPROM.

T1 is strictly for production test. It is designed to only be activated while the device is in the production tester.

Peter Snowberg · Post by **Peter Snowberg** » Fri Nov 03, 2006 9:41 am

Thank you, Frank.

Many basic I2C hosts seem to use an open collector output for SDA while driving SCL all the time from a regular logic output. I just wanted to make sure that wasn't the case here.

-Peter