Spin Semiconductor

Hi:

I was looking for the frequency shifter code that used to be linked from the Knowledge Base page, at

http://www.spinsemi.com/knowledge_base/pitch_sft.html

The link currently produces a 404 error.

Quick question: Does the phase differencing network used in the example use delay memory for the allpasses, or registers? I might try to use the delay memory for my network, as it seems like the delay based allpasses can be much quicker to compute, but the extra 5 bits of accuracy for register based allpasses might make a difference for the amount of sideband rejection I am looking for.

Thanks,

Sean Costello

Link fixed, the correct link is:
http://www.spinsemi.com/knowledge_base/Pitch_Sft.html

Thanks! I tried porting my 12th order phase differencing network over, and it sounds OK, but I am guessing that the coefficient quantization is causing problems. I would like to convert the allpasses to using registers as the sample delay, but my attempts have resulted in horrible noise. What is an efficient way of implementing a cascade of 1st order allpasses using registers, with fixed coefficients?

Also, is there any way of implementing Transposed Direct Form II allpasses? These have a lot less internal gain, as the zero is calculated first.

Thanks for your help,

Sean Costello

Good questions, don't know. I haven't used registers for sample delays and I've never used TDF-II for an allpass. If I can get some time I'll play with a few ideas on best way to implement them in the FV-1.

Thanks for the help. Figured out that delay based allpasses work well enough for my applications.

Sean Costello